605 search results - page 32 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
SIGMOD
2011
ACM
12 years 10 months ago
2011
ACM
Today’s one-pass analytics applications tend to be data-intensive in nature and require the ability to process high volumes of data efficiently. MapReduce is a popular programm...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
ISCAS
1999
IEEE
13 years 11 months ago
1999
IEEE
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
COMPUTER
2002
13 years 7 months ago
2002
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Langua...