605 search results - page 77 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
VLDB
1999
ACM
14 years 3 months ago
1999
ACM
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
DAC
2002
ACM
14 years 11 months ago
2002
ACM
Since software is playing an increasingly important role in systemon-chip, retargetable compilation has been an active research area in the last few years. However, the retargetti...
ASAP
2004
IEEE
14 years 2 months ago
2004
IEEE
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
ISPASS
2005
IEEE
14 years 4 months ago
2005
IEEE
Computer architecture research in academia and industry is heavily reliant on simulation studies. While microprocessor companies have the resources to develop highly detailed simu...
VLSID
2004
IEEE
14 years 11 months ago
2004
IEEE
This paper targets at reducing the crosstalk noise closure time by filtering the set of false violations. We propose two approaches to reduce the pessimism in the crosstalk noise ...