605 search results - page 95 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
ESTIMEDIA
2004
Springer
14 years 6 days ago
2004
Springer
This paper presents a new adaptive scheme to reduce the computation energy of the discrete cosine transform (DCT) architecture for image/video coding. The scheme employs the noise ...
FTDCS
2004
IEEE
14 years 6 days ago
2004
IEEE
Distributed embedded sensor networks are now being successfully deployed in environmental monitoring of natural phenomena as well as for applications in commerce and physical secu...
DAC
1997
ACM
14 years 20 days ago
1997
ACM
Binary Decision Diagrams BDDs are e cient at manipulating large sets in a compact manner. BDDs, however, are inefcient at utilizing the memory hierarchy of the computer. Recent ...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive computations on large data sets. These data sets get to be ...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...