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INFOCOM
1995
IEEE
14 years 1 days ago
Measuring the Performance of Parallel Message-Based Process Architectures
Message-based process architectures are widely regarded as an effective method for structuring parallel protocol processing on shared memory multi-processor platforms. A message-b...
Douglas C. Schmidt, Tatsuya Suda
SIGCOMM
2012
ACM
11 years 11 months ago
Choice as a principle in network architecture
There has been a great interest in defining a new network architecture that can meet the needs of a future Internet. One of the main challenges in this context is how to realize ...
Tilman Wolf, James Griffioen, Kenneth L. Calvert, ...
ICCCN
1998
IEEE
14 years 22 days ago
A Parallel-Tree Switch Architecture for ATM Networks
In this paper we present a novel ATM switch called ParallelTree Banyan Switch Fabric (PTBSF) that consists of parallel Banyans arranged in a tree topology. Packets enter at the to...
Mayez A. Al-Mouhamed, Habib Youssef, Wasif Hasan
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
ERSA
2006
128views Hardware» more  ERSA 2006»
13 years 10 months ago
Reconfigurable Turbo/Viterbi Channel Decoder in the Coarse-Grained Montium Architecture
Mobile wireless communication systems become multi-mode systems. These future mobile systems employ multiple wireless communication standards, which are different by means of algor...
Gerard K. Rauwerda, Gerard J. M. Smit, Casper R. W...