Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
In this paper, we present a scalable fully distributed version of a Mobile Backbone Network Topology Synthesis Algorithm (MBN-TSA) for constructing and maintaining a dynamic backb...
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
— The tolerance design directly influences the functionality of products and production costs. Tolerance synthesis is a procedure that distributes assembly tolerances between com...
Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic can be complex and expensive. This pape...