115 search results - page 18 / 23 » Sequential Circuit Verification Using Symbolic Model Checkin... |
ACL2
2006
ACM
13 years 11 months ago
2006
ACM
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...
TSE
2008
13 years 7 months ago
2008
We propose an interface specification language based on grammars for modular software model checking. In our interface specification language, component interfaces are specified a...
FTCS
1998
13 years 9 months ago
1998
Ensuring the correctness of computer systems used in lifecritical applications is very difficult. The most commonly used verification methods, simulation and testing, are not exha...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
ICCAD
2007
IEEE
13 years 11 months ago
2007
IEEE
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...