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» Sequential Circuits for Relational Analysis
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DATE
2008
IEEE
122views Hardware» more  DATE 2008»
14 years 2 months ago
Digital bit stream jitter testing using jitter expansion
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...
Hyun Choi, Abhijit Chatterjee
AVSS
2007
IEEE
14 years 2 months ago
Towards robust face recognition for Intelligent-CCTV based surveillance using one gallery image
In recent years, the use of Intelligent Closed-Circuit Television (ICCTV) for crime prevention and detection has attracted significant attention. Existing face recognition system...
Ting Shan, Shaokang Chen, Conrad Sanderson, Brian ...
IMR
2004
Springer
14 years 1 months ago
A Generalized Graph-Theoretic Mesh Optimization Model
This paper presents a generic approach to mesh global optimization via node movement, based on a discrete graph-theoretic model. Mesh is considered as an electric system with lump...
Andrey A. Mezentsev
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
14 years 10 days ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...
HYBRID
1994
Springer
14 years 9 hour ago
Symbolic Controller Synthesis for Discrete and Timed Systems
This paper presents algorithms for the symbolic synthesis of discrete and real-time controllers. At the semantic level the controller is synthesized by nding a winning strategy for...
Eugene Asarin, Oded Maler, Amir Pnueli