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» Sequential circuits for program analysis
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CORR
2006
Springer
125views Education» more  CORR 2006»
13 years 7 months ago
Reversible Logic to Cryptographic Hardware: A New Paradigm
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed i...
Himanshu Thapliyal, Mark Zwolinski
TPDS
1998
157views more  TPDS 1998»
13 years 7 months ago
A Compiler Optimization Algorithm for Shared-Memory Multiprocessors
This paper presents a new compiler optimization algorithm that parallelizes applications for symmetric, sharedmemory multiprocessors. The algorithm considers data locality, parall...
Kathryn S. McKinley
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 4 months ago
Robust analog/RF circuit design with projection-based posynomial modeling
In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthe...
Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence ...
CEC
2011
IEEE
12 years 7 months ago
Cost-benefit analysis of using heuristics in ACGP
—Constrained Genetic Programming (CGP) is a method of searching the Genetic Programming search space non-uniformly, giving preferences to certain subspaces according to some heur...
John W. Aleshunas, Cezary Z. Janikow
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
13 years 12 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko