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» Sequential circuits for program analysis
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CODES
2008
IEEE
13 years 9 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 28 days ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
DAC
2010
ACM
13 years 7 months ago
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations
We study diagnosis of segments on speedpaths that fail the timing constraint at the post-silicon stage due to manufacturing variations. We propose a formal procedure that is appli...
Lin Xie, Azadeh Davoodi, Kewal K. Saluja
HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
13 years 11 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
CSB
2005
IEEE
118views Bioinformatics» more  CSB 2005»
14 years 1 months ago
Gene Teams with Relaxed Proximity Constraint
Functionally related genes co-evolve, probably due to the strong selection pressure in evolution. Thus we expect that they are present in multiple genomes. Physical proximity amon...
Sun Kim, Jeong-Hyeon Choi, Jiong Yang