69 search results - page 6 / 14 » Sequential synthesis using S1S |
DSD
2010
IEEE
13 years 6 months ago
2010
IEEE
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
CGF
2008
13 years 7 months ago
2008
Creating long motion sequences is a time-consuming task even when motion capture equipment or motion editing tools are used. In this paper, we propose a system for creating a long...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
ICCAD
1993
IEEE
13 years 12 months ago
1993
IEEE
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...