111 search results - page 10 / 23 » Serialized parallel code generation framework for MPSoC |
PC
2006
13 years 7 months ago
2006
Tiling is a well known loop transformation used to reduce communication overhead in distributed memory machines. Although a lot of theoretical research has been done concerning th...
ICPP
1991
IEEE
13 years 11 months ago
1991
IEEE
Data decomposition is probably the most successful method for generating parallel programs. In this paper a general framework is described for the automatic generation of parallel...
CORR
2008
Springer
13 years 7 months ago
2008
Springer
The application of genetic algorithms (GAs) to many optimization problems in organizations often results in good performance and high quality solutions. For successful and efficien...
FCCM
2011
IEEE
12 years 11 months ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
IEEEPACT
2002
IEEE
14 years 16 days ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...