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» Serialized parallel code generation framework for MPSoC
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DATE
2005
IEEE
125views Hardware» more  DATE 2005»
14 years 1 months ago
Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler
Embedded software continues to play an ever increasing role in the design of complex embedded applications. In part, the elevel of abstraction provided by a high-level programming...
André C. Nácul, Tony Givargis
TCOM
2011
95views more  TCOM 2011»
13 years 2 months ago
Unifying Analysis and Design of Rate-Compatible Concatenated Codes
—An improved concatenated code structure, which generalizes parallel and serially concatenated convolutional codes is presented and investigated. The structure is ideal for desig...
Alexandre Graell i Amat, Lars K. Rasmussen, Fredri...
ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
14 years 4 months ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
CODES
2006
IEEE
14 years 1 months ago
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies
Real-time multi-media applications are increasingly being mapped onto MPSoC (multi-processor system-on-chip) platforms containing hardware-software IPs (intellectual property) alo...
Minyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nali...
CODES
2006
IEEE
14 years 1 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...