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ISLPED
2010
ACM
183views Hardware» more  ISLPED 2010»
13 years 11 months ago
A pareto-algebraic framework for signal power optimization in global routing
This paper proposes a framework for (signal) interconnect power optimization at the global routing stage. In a typical design flow, the primary objective of global routing is mini...
Hamid Shojaei, Tai-Hsuan Wu, Azadeh Davoodi, Twan ...
ISVLSI
2007
IEEE
184views VLSI» more  ISVLSI 2007»
14 years 5 months ago
Activity-Aware Registers Placement for Low Power Gated Clock Tree Construction
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 5 months ago
Performance optimal speed control of multi-core processors under thermal constraints
Abstract—Advances in chip-multiprocessor processing capabilities has led to an increased power consumption and temperature hotspots. Maintaining the on-chip temperature is import...
Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Ch...
INFOCOM
2009
IEEE
14 years 5 months ago
C-MAC: Model-Driven Concurrent Medium Access Control for Wireless Sensor Networks
— This paper presents C-MAC, a new MAC protocol designed to achieve high-throughput bulk communication for dataintensive sensing applications. C-MAC exploits concurrent wireless ...
Mo Sha, Guoliang Xing, Gang Zhou, Shucheng Liu, Xi...
NIPS
2007
14 years 6 days ago
Managing Power Consumption and Performance of Computing Systems Using Reinforcement Learning
Electrical power management in large-scale IT systems such as commercial datacenters is an application area of rapidly growing interest from both an economic and ecological perspe...
Gerald Tesauro, Rajarshi Das, Hoi Chan, Jeffrey O....