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ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
15 years 6 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri
CODES
2006
IEEE
15 years 8 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
139
Voted
NOCS
2007
IEEE
15 years 8 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
GLOBECOM
2006
IEEE
15 years 8 months ago
Harnessing the Parity of Multiple Errors in End-to-End MAC Schemes
— We present the results of simulation experiments that compare end-to-end error management (used in controlled access MAC protocols) against hop-by-hop error management (used in...
Ghassen Ben Brahim, Bilal Khan, Ala I. Al-Fuqaha, ...
CDC
2008
IEEE
137views Control Systems» more  CDC 2008»
15 years 9 months ago
On the stability of the Foschini-Miljanic algorithm with time-delays
— Many of the distributed power control algorithms for wireless networks in the literature ignore the fact that while the algorithms necessitate communication among users, propag...
Themistoklis Charalambous, Ioannis Lestas, Glenn V...