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» Set Constraints in Logic Programming
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DAC
2006
ACM
14 years 9 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan
PADL
2009
Springer
14 years 8 months ago
Declarative Network Verification
Abstract. In this paper, we present our initial design and implementation of a declarative network verifier (DNV). DNV utilizes theorem proving, a well established verification tec...
Anduo Wang, Prithwish Basu, Boon Thau Loo, Oleg So...
CADE
2009
Springer
14 years 8 months ago
Real World Verification
Scalable handling of real arithmetic is a crucial part of the verification of hybrid systems, mathematical algorithms, and mixed analog/digital circuits. Despite substantial advanc...
André Platzer, Jan-David Quesel, Philipp R&...
ASPLOS
2009
ACM
14 years 2 months ago
Architectural implications of nanoscale integrated sensing and computing
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...
Constantin Pistol, Christopher Dwyer, Alvin R. Leb...
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 2 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...