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VLDB
1997
ACM
109views Database» more  VLDB 1997»
14 years 2 months ago
Logical and Physical Versioning in Main Memory Databases
We present a design for multi-version concurrency control and recovery in a main memory database, and describe logical and physical versioning schemes that allow read-only transac...
Rajeev Rastogi, S. Seshadri, Philip Bohannon, Denn...
NIPS
2003
13 years 11 months ago
Dopamine Modulation in a Basal Ganglio-cortical Network Implements Saliency-based Gating of Working Memory
Dopamine exerts two classes of effect on the sustained neural activity in prefrontal cortex that underlies working memory. Direct release in the cortex increases the contrast of p...
Aaron J. Gruber, Peter Dayan, Boris S. Gutkin, Sar...
TCSV
2002
89views more  TCSV 2002»
13 years 9 months ago
Reducing energy dissipation of frame memory by adaptive bit-width compression
Abstract--In this paper, we propose a new architectural technique to reduce energy dissipation of frame memory through adaptive bitwith compression. Unlike related approaches, the ...
Vasily G. Moshnyaga
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 6 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
ARITH
1993
IEEE
14 years 2 months ago
An accurate LNS arithmetic unit using interleaved memory function interpolator
This paper describes a logarithmic number system (LNS) arithmetic unit using a new methodfor polynomial interpolation in hardware. The use of an interleaved memory reduces storage...
David M. Lewis