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» Shared Memory Multiprocessor Support for SAC
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SC
1995
ACM
13 years 11 months ago
Lazy Release Consistency for Hardware-Coherent Multiprocessors
Release consistency is a widely accepted memory model for distributed shared memory systems. Eager release consistency represents the state of the art in release consistent protoc...
Leonidas I. Kontothanassis, Michael L. Scott, Rica...
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
13 years 12 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
FTCS
1998
77views more  FTCS 1998»
13 years 9 months ago
Strong Partitioning Protocol for a Multiprocessor VME System
The trend in implementing today's embedded applications is toward the use of commercial-off-the-shelf open architecture. Reducing costs and facilitating systems integration a...
Mohamed F. Younis, Jeffrey X. Zhou, Mohamed Abouta...
EMSOFT
2005
Springer
14 years 1 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir
ICS
2005
Tsinghua U.
14 years 1 months ago
A NUCA substrate for flexible CMP cache sharing
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...