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WAIM
2007
Springer
14 years 2 months ago
The Selection of Tunable DBMS Resources Using the Incremental/Decremental Relationship
The DBMS performance might change by allocating resources and by performing a specific kind of workload. Database administrators should be able to identify relative resources that ...
Jeong Seok Oh, Hyun Woong Shin, Sang Ho Lee
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 2 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
MICRO
2009
IEEE
133views Hardware» more  MICRO 2009»
14 years 3 months ago
A tagless coherence directory
A key challenge in architecting a CMP with many cores is maintaining cache coherence in an efficient manner. Directory-based protocols avoid the bandwidth overhead of snoop-based ...
Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin...
HIPEAC
2011
Springer
12 years 8 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
SOSP
2007
ACM
14 years 5 months ago
Sinfonia: a new paradigm for building scalable distributed systems
We propose a new paradigm for building scalable distributed systems. Our approach does not require dealing with message-passing protocols—a major complication in existing distri...
Marcos Kawazoe Aguilera, Arif Merchant, Mehul A. S...