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ASPDAC
2011
ACM
217views Hardware» more  ASPDAC 2011»
12 years 11 months ago
Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core syst
This paper studies realization and performance comparison of the sequential and weak consistency models in the network-on-chip (NoC) based distributed shared memory (DSM) multi-cor...
Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jants...
CCECE
2011
IEEE
12 years 7 months ago
A flash resident file system for embedded sensor networks
Many embedded devices, especially those designed for environmental sensor logging, have extremely limited RAM, often less than several kilobytes. Logged data is stored on flash m...
Scott Fazackerley, Ramon Lawrence
CAL
2011
12 years 7 months ago
DRAMSim2: A Cycle Accurate Memory System Simulator
—In this paper we present DRAMSim2, a cycle accurate memory system simulator. The goal of DRAMSim2 is to be an accurate and publicly available DDR2/3 memory system model which ca...
Paul Rosenfeld, Elliott Cooper-Balis, Bruce Jacob
IACR
2011
86views more  IACR 2011»
12 years 7 months ago
Protecting Drive Encryption Systems Against Memory Attacks
Software drive encryption systems are vulnerable to memory attacks, in which an attacker gains physical accesses to the unattended computer, obtains the decryption keys from memor...
Leo Dorrendorf
IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
12 years 10 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross