Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
Based on a timing yield model, a statistical static timing analysis technique is proposed. This technique preserves existing methodology by selecting a “device file setting” ...
Information theory provides a range of useful methods to analyse probability distributions and these techniques have been successfully applied to measure information flow and the ...
Konstantinos Chatzikokolakis, Tom Chothia, Apratim...
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...