202 search results - page 17 / 41 » Signal Processing Algorithms and Multiple-Valued Logic Desig... |
DAC
2006
ACM
14 years 1 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
EMNLP
2010
13 years 5 months ago
2010
This paper addresses the problem of learning to map sentences to logical form, given training data consisting of natural language sentences paired with logical representations of ...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
ICASSP
2009
IEEE
13 years 11 months ago
2009
IEEE
In this paper, we investigate the timing and carrier frequency offset (CFO) synchronization problem in decode and forward cooperative systems operating over frequency selective ch...
DAC
2009
ACM
14 years 2 months ago
2009
ACM
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...