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» Signature Verification Using Static and Dynamic Features
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SCAM
2006
IEEE
14 years 1 months ago
Characterising, Explaining, and Exploiting the Approximate Nature of Static Analysis through Animation
This paper addresses the question: “How can animated visualisation be used to express interesting properties of static analysis?” The particular focus is upon static dependenc...
David Binkley, Mark Harman, Jens Krinke
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
14 years 1 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
TLDI
2009
ACM
142views Formal Methods» more  TLDI 2009»
14 years 4 months ago
Static extraction of sound hierarchical runtime object graphs
For many object-oriented systems, it is often useful to have a runtime architecture that shows networks of communicating objects. But it is hard to statically extract runtime obje...
Marwan Abi-Antoun, Jonathan Aldrich
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 4 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
ENTCS
2002
181views more  ENTCS 2002»
13 years 7 months ago
Alias verification for Fortran code optimization
Abstract: Alias analysis for Fortran is less complicated than for programming languages with pointers but many real Fortran programs violate the standard: a formal parameter or a c...
Thi Viet Nga Nguyen, François Irigoin