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DATE
2003
IEEE
109views Hardware» more  DATE 2003»
14 years 1 months ago
A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors
This paper presents a new algorithm for on-the-fly data compression in high performance VLIW processors. The algorithm aggressively targets energy minimization of some of the domi...
Alberto Macii, Enrico Macii, Fabrizio Crudo, Rober...
CAISE
2008
Springer
13 years 10 months ago
Refactoring Process Models in Large Process Repositories
With the increasing adoption of process-aware information systems (PAIS), large process model repositories have emerged. Over time respective models have to be re-aligned to the re...
Barbara Weber, Manfred Reichert
ISCA
2006
IEEE
187views Hardware» more  ISCA 2006»
14 years 2 months ago
A Case for MLP-Aware Cache Replacement
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu,...
ACMSE
2004
ACM
14 years 2 months ago
Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite
Replacement policy, one of the key factors determining the effectiveness of a cache, becomes even more important with latest technological trends toward highly associative caches....
Hussein Al-Zoubi, Aleksandar Milenkovic, Milena Mi...
JRTIP
2008
249views more  JRTIP 2008»
13 years 8 months ago
Model-based mapping of reconfigurable image registration on FPGA platforms
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
Mainak Sen, Yashwanth Hemaraj, William Plishker, R...