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CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
POPL
2004
ACM
14 years 7 months ago
Atomizer: a dynamic atomicity checker for multithreaded programs
Ensuring the correctness of multithreaded programs is difficult, due to the potential for unexpected interactions between concurrent threads. Much previous work has focused on det...
Cormac Flanagan, Stephen N. Freund
POPL
2003
ACM
14 years 7 months ago
Interprocedural compatibility analysis for static object preallocation
We present an interprocedural and compositional algorithm for finding pairs of compatible allocation sites, which have the property that no object allocated at one site is live at...
Ovidiu Gheorghioiu, Alexandru Salcianu, Martin C. ...
VTC
2008
IEEE
102views Communications» more  VTC 2008»
14 years 1 months ago
Channel Prediction Aided Multiuser Transmission in SDMA
— Transmit preprocessing employed at the basestation (BS) has been proposed for simplifying the design of the mobile receiver. Provided that the channel impulse response (CIR) of...
Wei Liu, Lie-Liang Yang, Lajos Hanzo
ISCA
2005
IEEE
117views Hardware» more  ISCA 2005»
14 years 1 months ago
Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...
Amir Roth