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SIPS
2007
IEEE
14 years 2 months ago
Sphere Decoding for Multiprocessor Architectures
Motivated by the need for high throughput sphere decoding for multipleinput-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD)...
Qi Qi, Chaitali Chakrabarti
FCCM
2006
IEEE
120views VLSI» more  FCCM 2006»
14 years 2 months ago
FPGAs, GPUs and the PS2 - A Single Programming Methodology
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
PPOPP
2006
ACM
14 years 2 months ago
POSH: a TLS compiler that exploits program structure
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood, it is important to focus on TLS compilation. TLS compilers are interesting in that,...
Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin ...
MM
2004
ACM
84views Multimedia» more  MM 2004»
14 years 1 months ago
Tools used while developing auracle: a voice-controlled networked instrument
Auracle is a networked sound instrument controlled by the voice. Users jam together over the Internet using only a microphone. Throughout the development process, the authors expe...
Kristjan Varnik, Jason Freeman, Chandrasekhar Rama...
PATMOS
2004
Springer
14 years 1 months ago
Application Analysis with Integrated Identification of Complex Instructions for Configurable Processors
Abstract. An extensible and configurable processor is a programmable platform offering the possibility to customize the instruction set and/or underlying microarchitecture. Efficie...
Nikolaos Kavvadias, Spiridon Nikolaidis