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ERSA
2006
133views Hardware» more  ERSA 2006»
13 years 10 months ago
An FPGA based Co-Design Architecture for MIMO Lattice Decoders
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
Cao Liang, Jing Ma, Xin-Ming Huang
CDC
2009
IEEE
129views Control Systems» more  CDC 2009»
14 years 1 months ago
Improving the performance of active set based Model Predictive Controls by dataflow methods
Abstract-- Dataflow representations of Digital Signal Processing (DSP) software have been developing since the 1980's. They have proven to be useful in identifying bottlenecks...
Ruirui Gu, Shuvra S. Bhattacharyya, William S. Lev...
IPPS
2006
IEEE
14 years 3 months ago
FPGA based architecture for DNA sequence comparison and database search
DNA sequence comparison is a computationally intensive problem, known widely since the competition for human DNA decryption. Database search for DNA sequence comparison is of grea...
Euripides Sotiriades, Christos Kozanitis, Apostolo...
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
14 years 2 months ago
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step
Abstract — This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay defect d...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation
In the paper, we develop a systematic methodology for modeling sampled interconnect frequency response data based on spline interpolation. Through piecewise polynomial interpolatio...
Arthur Nieuwoudt, Mehboob Alam, Yehia Massoud