943 search results - page 102 / 189 » Simulation based deadlock analysis for system level designs |
SDL
2003
13 years 10 months ago
2003
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
ISPASS
2006
IEEE
14 years 3 months ago
2006
IEEE
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
AR
2006
13 years 9 months ago
2006
In this paper the control of exible joint manipulators is studied in detail. The model of N{axis exible joint manipulators are derived and reformulated in the form of singular per...
PROMISE
2010
13 years 3 months ago
2010
Background: Defects are related to failures and they do not have much power for indicating a higher quality or a better system above the baseline that the end-users expect. Nevert...