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» Simulation based deadlock analysis for system level designs
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DAC
2008
ACM
14 years 10 months ago
Feedback-controlled reliability-aware power management for real-time embedded systems
In recent literature it has been reported that Dynamic Power Management (DPM) may lead to decreased reliability in real-time embedded systems. The ever-shrinking device sizes cont...
Ranjani Sridharan, Nikhil Gupta, Rabi N. Mahapatra
CNSR
2008
IEEE
140views Communications» more  CNSR 2008»
14 years 3 months ago
An Approach for Optimal Bandwidth Allocation in Packet Processing Systems
The increasing demand for more bandwidth and the increased application variety fuel the need for high performance network processors. A simple but highly repetitive task performed...
Mahmood Ahmadi, Stephan Wong
ISVLSI
2007
IEEE
232views VLSI» more  ISVLSI 2007»
14 years 3 months ago
DSPstone Benchmark of CoDeL's Automated Clock Gating Platform
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
Nainesh Agarwal, Nikitas J. Dimopoulos
MOBIHOC
2003
ACM
14 years 2 months ago
Mobility modelling and trajectory prediction for cellular networks with mobile base stations
This paper provides mobility estimation and prediction for a variant of GSM network which resembles an adhoc wireless mobile network where base stations and users are both mobile....
Pubudu N. Pathirana, Andrey V. Savkin, Sanjay Jha
MICRO
2008
IEEE
103views Hardware» more  MICRO 2008»
14 years 3 months ago
Testudo: Heavyweight security analysis via statistical sampling
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Tradi...
Joseph L. Greathouse, Ilya Wagner, David A. Ramos,...