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» Simulation based deadlock analysis for system level designs
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CODES
2008
IEEE
14 years 2 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
AOIS
2003
13 years 9 months ago
Market-Based Recommendations: Design, Simulation and Evaluation
This paper reports on the design, implementation, and evaluation of a market-based recommender system that suggests relevant documents to users. The key feature of the system is t...
Yan Zheng Wei, Luc Moreau, Nicholas R. Jennings
DAC
2010
ACM
13 years 7 months ago
Virtual channels vs. multiple physical networks: a comparative analysis
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
Young-Jin Yoon, Nicola Concer, Michele Petracca, L...
DAC
2007
ACM
14 years 8 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
WSC
2000
13 years 8 months ago
Simulation based operational analysis of future space transportation systems
This paper presents an approach to the operational analysis of future space transportation systems. The approach combines knowledge from government and industry space operation an...
Alex J. Ruiz-Torres, Edgar Zapata