943 search results - page 22 / 189 » Simulation based deadlock analysis for system level designs |
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
JUCS
2000
13 years 7 months ago
2000
: Embedded Computer-based Systems are becoming highly complex and hard to implement because of the large number of concerns the designers have to address. These systems are tightly...
WOSP
1998
ACM
13 years 11 months ago
1998
ACM
The POEMS project is creating an environment for end-to-end performance modeling of complex parallel and distributed systems, spanning the domains of application software, runti...
WSC
2007
13 years 10 months ago
2007
Fluctuations of work-in-progress (WIP) levels cause variability of cycle time and often lead to productivity losses in semiconductor wafer fabrication plants. To identify sources ...