943 search results - page 80 / 189 » Simulation based deadlock analysis for system level designs |
RSP
1998
IEEE
14 years 1 months ago
1998
IEEE
A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved co...
ECAI
2008
Springer
13 years 10 months ago
2008
Springer
Abstract. This paper shows that we can take advantage of information about the probabilities of the occurrences of events, when this information is available, to refine the classic...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
ECBS
1997
IEEE
14 years 1 months ago
1997
IEEE
We present a new approach to an interactive design and analysis environment for visual languages. The main components, i.e., editor, animator, and interpreter, are introduced. The...
CORR
2007
Springer
13 years 9 months ago
2007
Springer
— In order to optimize the costs and time of design of the new products while improving their quality, concurrent engineering is based on the digital model of these products, the...