This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...
At Northeastern University we are building a number of courses upon a common embedded systems platform. The goal is to reduce the learning curve associated with new architectures ...
Michael G. Benjamin, David R. Kaeli, Richard Platc...
— This paper presents a novel approach based on Jacobi shape theory and geometric reduction for formation control of autonomous underwater vehicles (AUVs). We consider a three de...
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...