Substrate noise caused by large digital circuits will degrade the performance of analog circuits located on the same substrate. To simulate this performance degradation, the total...
We present chaining techniques for signing/verifying multiple packets using a single signing/verification operation. We then present flow signing and verification procedures based...
for a set of operating conditions and coating color formulations, undesirable phenomena like color spitting and coating ribs may be triggered in the Micro-nip during the coating pr...
We present, in this paper, an algorithm which integrates flow control and dynamic load balancing in Time Warp. The algorithm is intended for use in a distributed memory environme...
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...