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» Simulation of High-Performance Memory Allocators
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SIES
2009
IEEE
14 years 5 months ago
A modular fast simulation framework for stream-oriented MPSoC
—The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to th...
Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Ha...
DATE
2007
IEEE
185views Hardware» more  DATE 2007»
14 years 5 months ago
An ILP formulation for system-level application mapping on network processor architectures
Current day network processors incorporate several architectural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to suppor...
Christopher Ostler, Karam S. Chatha
EUROMICRO
1999
IEEE
14 years 3 months ago
A Selective Compressed Memory System by On-Line Data Decompressing
This research proposes a selective compressed memory system (SCMS) focusing on a compressed cache architecture, in which only data blocks with good compression efficiency are comp...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
JCSS
2008
81views more  JCSS 2008»
13 years 10 months ago
A simulator for adaptive parallel applications
Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. Detailed simulations can help identify...
Basile Schaeli, Sebastian Gerlach, Roger D. Hersch
SIGMOD
1992
ACM
111views Database» more  SIGMOD 1992»
14 years 2 months ago
Performance Evaluation of Extended Storage Architectures for Transaction Processing
: The use of non-volatile semiconductor memory within an extended storage hierarchy promises significant performance improvements for transaction processing. Although page-addressa...
Erhard Rahm