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ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
16 years 2 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
16 years 8 days ago
Low-power IC design for a wireless BCI system
—Integrated circuit (IC) design for a wireless BCI system is put forward in this paper. The system is composed of an electrode, a stimulator, antennas, and an integrated circuit ...
Ming Liu, Hong Chen, Run Chen, Zhihua Wang
ASPDAC
2006
ACM
230views Hardware» more  ASPDAC 2006»
15 years 12 months ago
Statistical Bellman-Ford algorithm with an application to retiming
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...
Mongkol Ekpanyapong, Thaisiri Watewai, Sung Kyu Li...
PATMOS
2004
Springer
15 years 11 months ago
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...
Geoff V. Merrett, Bashir M. Al-Hashimi
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
15 years 11 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov