Sciweavers

1304 search results - page 186 / 261
» Simulation of Soliton Circuits
Sort
View
DAC
2004
ACM
14 years 19 days ago
A methodology to improve timing yield in the presence of process variations
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wa...
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
14 years 15 days ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
DAC
2005
ACM
13 years 11 months ago
Partitioning-based approach to fast on-chip decap budgeting and minimization
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...
ECCC
2008
168views more  ECCC 2008»
13 years 9 months ago
Algebrization: A New Barrier in Complexity Theory
Any proof of P = NP will have to overcome two barriers: relativization and natural proofs. Yet over the last decade, we have seen circuit lower bounds (for example, that PP does n...
Scott Aaronson, Avi Wigderson
JCSC
2002
129views more  JCSC 2002»
13 years 8 months ago
Leakage Current Reduction in VLSI Systems
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
David Blaauw, Steven M. Martin, Trevor N. Mudge, K...