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CODES
2007
IEEE
14 years 1 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
WWW
2011
ACM
13 years 2 months ago
Low-infrastructure methods to improve internet access for mobile users in emerging regions
As information technology supports more aspects of modern life, digital access has become an important tool for developing regions to lift themselves from poverty. Though broadban...
Sibren Isaacman, Margaret Martonosi
CF
2009
ACM
14 years 1 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
DAC
2002
ACM
14 years 8 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
MOBICOM
2004
ACM
14 years 26 days ago
End-to-end performance and fairness in multihop wireless backhaul networks
Wireless IEEE 802.11 networks in residences, small businesses, and public “hot spots” typically encounter the wireline access link (DSL, cable modem, T1, etc.) as the slowest ...
Violeta Gambiroza, Bahareh Sadeghi, Edward W. Knig...