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» Single Run Optimization Using the Reverse-Simulation Method
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105
Voted
LCPC
2005
Springer
15 years 8 months ago
Manipulating MAXLIVE for Spill-Free Register Allocation
Abstract. Many embedded systems use single-chip microcontrollers which have no on-chip RAM. In such a system, the processor registers must hold all live data values. Nanocontroller...
Shashi Deepa Arcot, Henry G. Dietz, Sarojini Priya...
185
Voted
SIGMOD
2005
ACM
126views Database» more  SIGMOD 2005»
16 years 2 months ago
Cost-Sensitive Reordering of Navigational Primitives
We present a method to evaluate path queries based on the novel concept of partial path instances. Our method (1) maximizes performance by means of sequential scans or asynchronou...
Carl-Christian Kanne, Matthias Brantner, Guido Moe...
TLDI
2010
ACM
225views Formal Methods» more  TLDI 2010»
15 years 11 months ago
Race-free and memory-safe multithreading: design and implementation in cyclone
We present the design of a formal low-level multi-threaded language with advanced region-based memory management and synchronization primitives, where well-typed programs are memo...
Prodromos Gerakios, Nikolaos Papaspyrou, Konstanti...
ISPD
2009
ACM
127views Hardware» more  ISPD 2009»
15 years 9 months ago
Synthesizing a representative critical path for post-silicon delay prediction
Several approaches to post-silicon adaptation require feedback from a replica of the nominal critical path, whose variations are intended to reflect those of the entire circuit a...
Qunzeng Liu, Sachin S. Sapatnekar
SBACPAD
2007
IEEE
110views Hardware» more  SBACPAD 2007»
15 years 9 months ago
Architectural Breakdown of End-to-End Latency in a TCP/IP Network
Adoption of the 10GbE Ethernet standard has been impeded by two important performance-oriented considerations: 1) processing requirements of common protocol stacks and 2) end-to-e...
Steen Larsen, Parthasarathy Sarangam, Ram Huggahal...