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IPPS
2006
IEEE
14 years 4 months ago
Analysis of checksum-based execution schemes for pipelined processors
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...
Bernhard Fechner
IROS
2006
IEEE
147views Robotics» more  IROS 2006»
14 years 4 months ago
Opportunistic Use of Vision to Push Back the Path-Planning Horizon
Abstract— Mobile robots need maps or other forms of geometric information about the environment to navigate. The mobility sensors (LADAR, stereo, etc.) on these robotic vehicles ...
Bart C. Nabbe, Derek Hoiem, Alexei A. Efros, Marti...
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
14 years 4 months ago
Phase measurement and adjustment of digital signals using random sampling technique
—This paper introduces a technique to measure and adjust the relative phase of on-chip high speed digital signals using a random sampling technique of inferential statistics. The...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 4 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
QEST
2006
IEEE
14 years 4 months ago
Causality, Responsibility, and Blame: A Structural-Model Approach
This talk will provide an overview of work that I have done with Hana Chockler, Orna Kupferman, and Judea Pearl [1, 2, 10, 9] on defining notions such as causality, explanation, ...
Joseph Y. Halpern
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