1859 search results - page 20 / 372 » Sketch-based path design |
ISPD
2009
ACM
14 years 2 months ago
2009
ACM
Several approaches to post-silicon adaptation require feedback from a replica of the nominal critical path, whose variations are intended to reflect those of the entire circuit a...
RTAS
2005
IEEE
14 years 1 months ago
2005
IEEE
It is advantageous to perform compiler optimizations to lower the WCET of a task since tasks with lower WCETs are easier to schedule and more likely to meet their deadlines. Compi...
RTS
2006
13 years 7 months ago
2006
It is advantageous to perform compiler optimizations that attempt to lower the worst-case execution time (WCET) of an embedded application since tasks with lower WCETs are easier ...
ATS
2009
IEEE
13 years 5 months ago
2009
IEEE
Negative bias temperature instability (NBTI) has been a significant reliability concern in current digital circuit design due to its effect of increasing the path delay with time a...
ERSA
2009
13 years 5 months ago
2009
Harnessing human computation is an approach to find problem solutions. In this paper, we investigate harnessing this human computation for a Field Programmable Gate Array (FPGA) p...