1859 search results - page 349 / 372 » Sketch-based path design |
PATMOS
2007
Springer
14 years 4 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
ICRA
2006
IEEE
14 years 4 months ago
2006
IEEE
— The configuration space of a robot is partitioned into free space and C-obstacle space. Most of the prior work in collision detection and motion planning algorithms is targete...
INFOCOM
2006
IEEE
14 years 4 months ago
2006
IEEE
—Routing algorithms such as Distance Vector and Link States have the routing table size as ΩΩΩΩ (n), where n is the number of destination identifiers, thus providing only...
INFOCOM
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— Simulation has been the dominant research methodology in wireless and sensor networking. When mobility is added, real-world experimentation is especially rare. However,...
ISCA
2006
IEEE
14 years 4 months ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...