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DSD
2008
IEEE
85views Hardware» more  DSD 2008»
14 years 3 months ago
TASTE: Testability Analysis Engine and Opened Libraries for Digital Data Path
Testability is one of the most important factors that are considered during design cycle along with reliability, speed, power consumption, cost and other factors important for a c...
Josef Strnadel
IPPS
2007
IEEE
14 years 3 months ago
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path
This paper presents the performance improvements and the energy reductions by coupling a highperformance coarse-grained reconfigurable data-path with a microprocessor in a generic...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
NCA
2006
IEEE
14 years 3 months ago
Multi-Path Multi-Channel Routing Protocol
In this paper we present a DSR-based multi-path Routing protocol, which has been developed for transmission of Multiple Description Coded (MDC) packets in wireless ad-hoc network ...
Bo Yan, Hamid Gharavi
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 2 months ago
Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths
In this work, the problem of open faults affecting the interconnections of SC circuits composed by data-path and control is analyzed. In particular, it is shown that, in case open...
Michele Favalli, Cecilia Metra
ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
14 years 2 months ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan