53 search results - page 10 / 11 » Smarter Memory: Improving Bandwidth for Streamed References |
CSO
2009
IEEE
14 years 2 months ago
2009
IEEE
The IBM Cell Broadband Engine (BE) is a multicore processor with a PowerPC host processor (PPE) and 8 synergic processor engines (SPEs). The Cell BE architecture is designed to im...
ISCA
1994
IEEE
14 years 3 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
CODES
2004
IEEE
14 years 2 months ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
CCR
2002
13 years 10 months ago
2002
Accurate network traffic measurement is required for accounting, bandwidth provisioning and detecting DoS attacks. These applications see the traffic as a collection of flows they...
HPCA
2004
IEEE
14 years 11 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...