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ASPDAC
2006
ACM
143views Hardware» more  ASPDAC 2006»
14 years 1 months ago
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
Yiyu Shi, Tong Jing, Lei He, Zhe Feng 0002, Xianlo...
DAC
1999
ACM
13 years 12 months ago
Exact Memory Size Estimation for Array Computations without Loop Unrolling
This paper presents a new algorithm for exact estimation of the minimum memory size required by programs dealing with array computations. Memory size is an important factor a ecti...
Ying Zhao, Sharad Malik
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
13 years 12 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
CEC
2007
IEEE
13 years 11 months ago
Development and validation of different hybridization strategies between GA and PSO
In this paper a new class of hybridization strategies between GA and PSO is presented and validated. The Genetical Swarm Optimization (GSO) approach is presented here with respect ...
A. Gandelli, F. Grimaccia, Marco Mussetta, Paola P...
JNW
2006
108views more  JNW 2006»
13 years 7 months ago
System-Level Fault Diagnosis Using Comparison Models: An Artificial-Immune-Systems-Based Approach
The design of large dependable multiprocessor systems requires quick and precise mechanisms for detecting the faulty nodes. The problem of system-level fault diagnosis is computati...
Mourad Elhadef, Shantanu Das, Amiya Nayak