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EUROPAR
1997
Springer
14 years 3 days ago
Modulo Scheduling with Cache Reuse Information
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
Chen Ding, Steve Carr, Philip H. Sweany
RTCSA
2006
IEEE
14 years 1 months ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
JHSN
2006
267views more  JHSN 2006»
13 years 8 months ago
Client-side access control enforcement using trusted computing and PEI models
It has been recognized for some time that software alone does not provide an adequate foundation for building a high-assurance trusted platform. The emergence of industry-standard ...
Ravi S. Sandhu, Xinwen Zhang, Kumar Ranganathan, M...
HPDC
2012
IEEE
11 years 10 months ago
Dynamic adaptive virtual core mapping to improve power, energy, and performance in multi-socket multicores
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...
Chang Bae, Lei Xia, Peter A. Dinda, John R. Lange
DATE
2004
IEEE
185views Hardware» more  DATE 2004»
13 years 11 months ago
Energy-Aware System Design for Wireless Multimedia
In this paper, we present various challenges that arise in the delivery and exchange of multimedia information to mobile devices. Specifically, we focus on techniques for maintain...
Hans Van Antwerpen, Nikil D. Dutt, Rajesh K. Gupta...