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JSS
2006
104views more  JSS 2006»
13 years 9 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
ICT
2004
Springer
156views Communications» more  ICT 2004»
14 years 2 months ago
An Architecture for Publishing and Distributing Service Components in Active Networks
- Application level active networks provide a way of transforming the current network infrastructure into one where new services and protocols are more easily adopted and utilized ...
Nikolaos D. Dragios, Constantine Harbilas, Konstan...
DSN
2003
IEEE
14 years 2 months ago
Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology
Arbitrary faults of a single node in a time-triggered architecture (TTA) bus topology system may cause error propagation to correct nodes and may lead to inconsistent system state...
Astrit Ademaj, Håkan Sivencrona, Günthe...
HIPEAC
2005
Springer
14 years 2 months ago
Dynamic Evolution of Congestion Trees: Analysis and Impact on Switch Architecture
Abstract. Designers of large parallel computers and clusters are becoming increasingly concerned with the cost and power consumption of the interconnection network. A simple way to...
Pedro Javier García, Jose Flich, José...
SIGCOMM
2009
ACM
14 years 3 months ago
Self management of a mobile thin client service
Mobile thin client computing is an enabler for the execution of demanding applications from mobile handhelds. In thin client computing, the application is executed on remote serve...
Lien Deboosere, Bert Vankeirsbilck, Pieter Simoens...