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MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 7 months ago
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
Emerging non-volatile memory technologies such as phase change memory (PCM) promise to increase storage system performance by a wide margin relative to both conventional disks and ...
Adrian M. Caulfield, Arup De, Joel Coburn, Todor I...
ASPLOS
2010
ACM
14 years 4 months ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis
SC
1995
ACM
14 years 1 months ago
Architectural Mechanisms for Explicit Communication in Shared Memory Multiprocessors
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
Umakishore Ramachandran, Gautam Shah, Anand Sivasu...
MOBISYS
2007
ACM
14 years 9 months ago
A time-and-value centric provenance model and architecture for medical event streams
Provenance becomes a critical requirement for healthcare IT infrastructures, especially when pervasive biomedical sensors act as a source of raw medical streams for large-scale, a...
Min Wang, Marion Blount, John Davis, Archan Misra,...
TC
2011
13 years 4 months ago
StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs
—CMOS scaling has long been a source of dramatic performance gains. However, semiconductor feature size reduction has resulted in increasing levels of operating temperatures and ...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...