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» Software Cache Coherence for Large Scale Multiprocessors
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EUROMICRO
1997
IEEE
13 years 11 months ago
What's ahead in computer design?
CMOS technology should, over the next few years, reach lithography of under 0.1¡ . This provides a die area improvement of a factor of 10 over today’s technology. What is the b...
Michael J. Flynn
ISPASS
2005
IEEE
14 years 1 months ago
Partitioning Multi-Threaded Processors with a Large Number of Threads
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
Ali El-Moursy, Rajeev Garg, David H. Albonesi, San...
ASPLOS
1996
ACM
13 years 11 months ago
Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...
Daniel J. Scales, Kourosh Gharachorloo, Chandramoh...
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
14 years 2 months ago
Adaptive prefetching for shared cache based chip multiprocessors
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
Mahmut T. Kandemir, Yuanrui Zhang, Ozcan Ozturk
IEEEPACT
1999
IEEE
13 years 12 months ago
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors
The performance of applications on large shared-memory multiprocessors with coherent caches depends on the interaction between the granularity of data sharing, the size of the coh...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...