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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 1 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
CONEXT
2009
ACM
13 years 8 months ago
Virtually eliminating router bugs
Software bugs in routers lead to network outages, security vulnerabilities, and other unexpected behavior. Rather than simply crashing the router, bugs can violate protocol semant...
Eric Keller, Minlan Yu, Matthew Caesar, Jennifer R...
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
14 years 2 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
ICALT
2005
IEEE
14 years 1 months ago
ActiveTutor
In this paper we present an architecture dedicated to an intelligently assisted educational tool which integrates within a unified framework software rational agents both at the m...
Jean Pierre Fournier
SC
2005
ACM
14 years 1 months ago
GLARE: A Grid Activity Registration, Deployment and Provisioning Framework
Resource management is a key concern for implementing effective Grid middleware and shielding application developers from low level details. Existing resource managers concentrat...
Mumtaz Siddiqui, Alex Villazón, Jürgen...