2498 search results - page 13 / 500 » Software Fault Tolerance |
DDECS
2007
IEEE
14 years 3 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
DSN
2000
IEEE
14 years 1 months ago
2000
IEEE
We describe an methodology for testing a software system for possible security flaws. Based on the observation that most security flaws are caused by the program’s inappropria...
DSN
2006
IEEE
14 years 2 months ago
2006
IEEE
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Computer architects have typically ad...
WOSS
2004
ACM
14 years 2 months ago
2004
ACM
The development of dependable software systems is a costly undertaking. Fault tolerance techniques as well as self-repair capabilities usually result in additional system complexi...
IOLTS
2009
IEEE
14 years 3 months ago
2009
IEEE
— The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault toleran...